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mirror of https://github.com/xtacocorex/CHIP_IO synced 2025-07-20 12:53:22 +00:00
Commit Graph

11 Commits

Author SHA1 Message Date
89cbea038e LRADC support to close out feature #15. Added Utilities to enable and disable the 1.8v pin on U13. Updated README. Updated version to 2.3 2016-12-01 05:55:26 +00:00
c8e4323c27 Updating spwmtest.py to check for Issue #16. Updated Changelog and version to 0.2.2 2016-07-30 14:46:25 -05:00
4f6acf4676 Pull Request #12 fixes for Issue #10. 2016-07-19 21:03:40 -05:00
e270080af8 Last commit for #10 to get the Overlay Manager implemented. i2c-1 still shows up as i2c-3, but everything should work. Will add new bug to investigate. Bumping rev to 0.2.0 as this is a big feature. Custom Overlay should work now 2016-07-16 17:33:09 -05:00
ea4a21235d Some refactoring of the edge detection code to clean stuff up, added more tests 2016-07-11 21:14:40 -05:00
a4dd1558f0 Realized that the AP-EINT1/3 test code wasn't actually testing callbacks, they do work properly in my testing. Reverting gptest.py to what it was. Revision Update. Issue #9 is resolved. 2016-07-10 19:23:45 -05:00
a9a2dbf862 Updating the version prior to merge of this branch into master 2016-07-09 22:26:50 -05:00
9ee83c0b38 Adding Python interface to get the base XIO numbers, fixes for gptest.py on the 4.4 kernel CHIPs 2016-07-03 11:49:17 -05:00
0e1cf46c4e Addressing Issue #1, adding the ability to set the AP-EINT1 and AP-EINT3 pins as useable for edge detection and callbacks 2016-04-08 21:47:42 -05:00
cea44c287d PWM support fixed, the test fails when trying to change the frequency, but I don't think that's an issue. Have not run this against something that needs PWM to operate, but the .dtb I have loaded has /sys/class/pwm/pwmchip0 and it can be configured with this code 2016-02-29 13:04:35 -06:00
01ae605491 Initial commit, working GPIO for all available CHIP GPIO pins, have not tested edge detection and callbacks 2016-02-24 21:48:40 -06:00