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3d1ecb6b5e
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Edge detection callback is now working for the XIO's. Blocking wait_for_edge works for both the AP-EINT1/3 and the XIO's. Need to figure out why AP-EINT1/3 don't work for the callback. This is to help fix issue #9.
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2016-07-10 16:37:22 -05:00 |
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db4493322d
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Inital attempt at fixing #9. Things are still broken. wait_for_edge no longer works on AP-EINT1/3, XIO will trigger only one on falling edge.
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2016-07-10 14:56:40 -05:00 |
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a9a2dbf862
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Updating the version prior to merge of this branch into master
v0.0.9
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2016-07-09 22:26:50 -05:00 |
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f6833db833
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I use vim pymode and don't want .ropeproject directories in the repo
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2016-07-09 18:45:19 -05:00 |
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7812063991
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Fixed softpwm bug ("disable" code didn't synchronize thread exit)
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2016-07-09 18:42:38 -05:00 |
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7123c0e308
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Evidently I don't know RST formatting. Hopefully this fixes the table of pin names for issue #7.
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2016-07-05 21:45:47 -05:00 |
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4c7cccd4b3
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Updating the README per issue #7 to include the pin names/alt-names/key. Also added information about the need for DTB overlay for PWM and SPI
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2016-07-05 21:34:29 -05:00 |
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0c6579914c
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Implementing alternate names per issue #7, still need to pull the pin names/alt-names/keys into the readme
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2016-07-05 20:50:49 -05:00 |
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6fdeb41b77
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Updating the README to mention running with super user permissions, adding sudo in front of py.test to help with issues found in issue #8
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2016-07-05 19:00:40 -05:00 |
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45ba0e5332
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More error checking work
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2016-07-04 14:45:41 -05:00 |
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694aa37f23
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Testing and error handling
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2016-07-04 14:35:45 -05:00 |
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0e7d03c472
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Fixed a bunch of error handling
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2016-07-04 13:56:11 -05:00 |
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fd29b17796
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Updating the changelog
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2016-07-03 12:05:06 -05:00 |
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54f14a88af
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Some fixes for the py.test modules. There are still errors and the softpwm stuff is still segfaulting
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2016-07-03 12:01:58 -05:00 |
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9ee83c0b38
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Adding Python interface to get the base XIO numbers, fixes for gptest.py on the 4.4 kernel CHIPs
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2016-07-03 11:49:17 -05:00 |
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92888aaca4
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Remove the .ropeproject stuff
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2016-07-02 19:23:53 -05:00 |
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3c4040d32f
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Made test program a bit more user friendly.
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2016-07-02 19:21:28 -05:00 |
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71b6829804
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Reworked a lot of error handling.
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2016-07-02 18:57:03 -05:00 |
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093922567a
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Added a bunch of sanity checking
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2016-06-26 14:28:06 -05:00 |
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5ad81066b2
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Merge branch 'master' into new_xio
# Conflicts:
# source/common.h
# source/py_gpio.c
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2016-06-25 20:13:09 -05:00 |
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1f4714a351
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Got rid of last of GPIO port constants from code.
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2016-06-25 20:02:45 -05:00 |
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34167a9574
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Some (not all) of the changes for the new XIO base addr
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2016-06-21 17:40:00 -05:00 |
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baaa5774db
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Updating the gpio_direction array to contain all the possible gpio. Not sure how this wasn't fubaring the code.
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2016-06-20 20:25:17 -05:00 |
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409c803aa5
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Forgot about the XIO checking in py_gpio.c for edge detection code.
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2016-06-20 20:24:18 -05:00 |
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0f89ae462c
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Simple updated to the XIO base logic based upon suggestions by fordsford
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2016-06-18 15:06:39 -05:00 |
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99193144f1
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Stupid logic error preventing XIO-P1 or higher to work. Fixed now
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2016-06-18 14:44:36 -05:00 |
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818be5202e
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Fixing the code to handle pulling the right XIO base number due to the change in the CHIP OS 1.1 with the 4.4 kernel, thanks to howientc and fordsfords for their help
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2016-06-18 14:34:41 -05:00 |
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133453c57e
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Merge pull request #3 from aninternetof/feature/Add_softpwm_rebased
Add software PWM
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2016-05-09 13:45:31 -05:00 |
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2ebbffd137
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Edits copyright name on SOFTPWM files
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2016-05-09 18:42:36 +00:00 |
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bfb660e371
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Fixes gpio name in SOFTPWM examples
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2016-05-09 18:33:48 +00:00 |
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3c912ecb72
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Reverts accidental change to c_pwm
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2016-05-06 17:38:51 +00:00 |
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f5063c199c
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Corrects backwards polarity
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2016-05-06 17:30:14 +00:00 |
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0cae62be43
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Update README.rst
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2016-05-06 17:30:14 +00:00 |
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67dd919fed
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Adds softpwm test
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2016-05-06 17:30:13 +00:00 |
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9ef55ede59
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Makes default polarity 1
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2016-05-06 17:30:13 +00:00 |
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2f3172568a
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Fixes bugs with creating thread. Forces 0 and 100 duty cycles
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2016-05-06 17:30:13 +00:00 |
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9538a4f52b
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Adds softpwm dependency on event_gpio
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2016-05-06 17:30:13 +00:00 |
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41203a46a6
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Adds mutex protection
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2016-05-06 17:30:12 +00:00 |
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d7bf982b11
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Adds softpwm disabling and restructures thread
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2016-05-06 17:30:12 +00:00 |
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9645d2aae3
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Sets up softpwm struct and thread
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2016-05-06 17:30:11 +00:00 |
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9ac22c32cd
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Adds softpwm files
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2016-05-06 17:30:11 +00:00 |
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777fda06a3
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Fixing issue #2, edge detection for the XIO pins now works, simple logic issue in the if statement for throwing errors if gpio number is bad
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2016-04-18 19:31:08 -05:00 |
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6e7dd4984c
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Updating the README to include notes on edge detection and fixing the first line since it wasn't formatted the way I wanted
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2016-04-09 10:27:53 -05:00 |
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0e1cf46c4e
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Addressing Issue #1, adding the ability to set the AP-EINT1 and AP-EINT3 pins as useable for edge detection and callbacks
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2016-04-08 21:47:42 -05:00 |
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c2ab013a5d
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Adding protection for to the GPIO to only allow edge detection and call back on the XIO pins, clean up of the PWM, updated test code
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2016-04-02 19:48:57 -05:00 |
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cea44c287d
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PWM support fixed, the test fails when trying to change the frequency, but I don't think that's an issue. Have not run this against something that needs PWM to operate, but the .dtb I have loaded has /sys/class/pwm/pwmchip0 and it can be configured with this code
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2016-02-29 13:04:35 -06:00 |
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1b7beac587
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Updating the readme for PWM instructions and added a test case for PRM which hasn't been tested
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2016-02-26 08:48:07 -06:00 |
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9d593828ae
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Initial PWM support for the CHIP even though the base .dtb does not support, this is untested
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2016-02-25 22:38:58 -06:00 |
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91918f8f36
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Removing accidentally commited bytecompiled test code
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2016-02-25 18:53:51 -06:00 |
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01ae605491
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Initial commit, working GPIO for all available CHIP GPIO pins, have not tested edge detection and callbacks
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2016-02-24 21:48:40 -06:00 |
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