first commit
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162
Listings/TimerDelay_1.lst
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162
Listings/TimerDelay_1.lst
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C51 COMPILER V9.54 TIMERDELAY_1 05/05/2018 23:36:54 PAGE 1
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C51 COMPILER V9.54, COMPILATION OF MODULE TIMERDELAY_1
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OBJECT MODULE PLACED IN .\Objects\TimerDelay_1.obj
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COMPILER INVOKED BY: C:\Keil_v5\C51\BIN\C51.EXE TimerDelay_1.c OPTIMIZE(8,SPEED) BROWSE DEBUG OBJECTEXTEND PRINT(.\Listi
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-ngs\TimerDelay_1.lst) TABS(2) OBJECT(.\Objects\TimerDelay_1.obj)
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line level source
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1 //<2F>P<EFBFBD>@<40><><EFBFBD>C<EFBFBD>`<60>X<EFBFBD><58><EFBFBD><EFBFBD> 0 - 9<>A<EFBFBD>C<EFBFBD>Ӹ<EFBFBD><D3B8>X<EFBFBD><58><EFBFBD>d 1.5 <20><>
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2
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3 #include <reg51.h>
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4
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5 // <20>ŧi D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD><CFBE>}
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6 sbit P2_6 = P2^6;
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7 sbit P2_7 = P2^7;
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8
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9 // <20>ŧi<C5A7><69><EFBFBD>ɨ禡
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10 void delay_1ms();
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11 void delay_1500ms();
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12
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13 // <20>ŧi<C5A7>C<EFBFBD>q<EFBFBD><71><EFBFBD>ܾ<EFBFBD><DCBE>禡
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14 void Slect_Seg(unsigned char number);
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15 void Display_Seg(unsigned char display);
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16
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17 //<2F>ŧi<C5A7>Ʀr<C6A6><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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18 char code NUM[10] = {
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19 0x3F, // 0
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20 0x06, // 1
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21 0x5B, // 2
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22 0x4F, // 3
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23 0x66, // 4
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24 0x6D, // 5
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25 0x7D, // 6
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26 0x07, // 7
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27 0x7F, // 8
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28 0x6F // 9
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29 };
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30
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31 // <20>D<EFBFBD>{<7B><>
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32 int main(){
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33 1 // <20>]<5D>w<EFBFBD><77><EFBFBD><EFBFBD><EFBFBD>G
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34 1 Slect_Seg(~0x01); // 0xfe <20>N<EFBFBD>O 11111110
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35 1
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36 1
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37 1 // <20><><EFBFBD><EFBFBD><EFBFBD>{<7B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>L<EFBFBD>a<EFBFBD>j<EFBFBD><6A>
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38 1 while(1) {
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39 2 // <20><><EFBFBD>Ʀr<C6A6>q 0 - 9
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40 2 int i;
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41 2 for(i = 0; i < 10; i++) {
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42 3 Display_Seg(NUM[i]);
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43 3 delay_1500ms(); // <20><><EFBFBD><EFBFBD> 1.5 <20><>
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44 3 }
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45 2 }
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46 1
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47 1 }
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48
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49 void Slect_Seg(unsigned char number) {
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50 1
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51 1 // <20><><EFBFBD><EFBFBD> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>(<28>w<EFBFBD><77><EFBFBD><EFBFBD><EFBFBD>I)
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52 1 P2_7 = 0;
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53 1
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54 1 // <20><><EFBFBD>w<EFBFBD><77><EFBFBD><EFBFBD><EFBFBD>G
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C51 COMPILER V9.54 TIMERDELAY_1 05/05/2018 23:36:54 PAGE 2
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55 1 P0 = number;
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56 1
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57 1 // <20>}<7D>ұ<EFBFBD><D2B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>G<EFBFBD><47> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>
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58 1 P2_7 = 1;
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59 1
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60 1 // <20><><EFBFBD><EFBFBD>(<28>Y<EFBFBD><59><EFBFBD><EFBFBD><EFBFBD>G)
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61 1 delay_1ms();
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62 1
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63 1 // <20><><EFBFBD><EFBFBD> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>(<28><><EFBFBD>Y<EFBFBD>i<EFBFBD>h<EFBFBD><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>T<EFBFBD>w<EFBFBD>G)
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64 1 P2_7 = 0;
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65 1 }
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66
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67 void Display_Seg(unsigned char display) {
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68 1
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69 1 // <20><><EFBFBD><EFBFBD> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>(<28>w<EFBFBD><77><EFBFBD><EFBFBD><EFBFBD>I)
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70 1 P2_6 = 0;
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71 1
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72 1 // <20><><EFBFBD>w<EFBFBD><77><EFBFBD>X
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73 1 P0 = display;
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74 1
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75 1 // <20>}<7D>ұ<EFBFBD><D2B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>G<EFBFBD><47> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>
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76 1 P2_6 = 1;
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77 1
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78 1 // <20><><EFBFBD><EFBFBD>(<28>Y<EFBFBD><59><EFBFBD>X)
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79 1 delay_1ms();
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80 1
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81 1 // <20><><EFBFBD><EFBFBD> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>(<28><><EFBFBD>Y<EFBFBD>i<EFBFBD>h<EFBFBD><68><EFBFBD><EFBFBD><EFBFBD>X<EFBFBD>T<EFBFBD>w<EFBFBD><77>)
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82 1 P2_6 = 0;
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83 1 }
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84
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85
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86
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87 // <20><><EFBFBD><EFBFBD> 1ms
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88 void delay_1ms(void) {
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89 1 //<2F>]<5D>w<EFBFBD><77> mode1
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90 1 TMOD = 0x10;
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91 1
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92 1 //<2F>]<5D>w<EFBFBD><77><EFBFBD>l<EFBFBD><6C>
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93 1 TF1 = 0;
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94 1 TR1 = 0;
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95 1 TL1 = (65536 - 9) % 256;
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96 1 TH1 = (65536 - 9) / 256;
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97 1
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98 1 //<2F>}<7D>ҭp<D2AD>ɾ<EFBFBD>
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99 1 TR1 = 1;
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100 1
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101 1 //<2F><> TF1 <20>S<EFBFBD><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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102 1 while(TF1 == 0);
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103 1
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104 1 //<2F><><EFBFBD><EFBFBD><EFBFBD>p<EFBFBD>ɾ<EFBFBD>
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105 1 TR1 = 0;
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106 1
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107 1 //<2F>N TF1 <20>k<EFBFBD>s
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108 1 TF1 = 0;
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109 1 }
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110
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111 // <20><><EFBFBD><EFBFBD> 1500ms
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112 void delay_1500ms(void) {
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113 1 //<2F>]<5D>w<EFBFBD><77> mode1
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||||||
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114 1 TMOD = 0x10;
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||||||
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115 1
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116 1 //<2F>]<5D>w<EFBFBD><77><EFBFBD>l<EFBFBD><6C>
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C51 COMPILER V9.54 TIMERDELAY_1 05/05/2018 23:36:54 PAGE 3
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117 1 TF1 = 0;
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118 1 TR1 = 0;
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119 1 TL1 = (65536 - 13824) % 256;
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120 1 TH1 = (65536 - 13824) / 256;
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||||||
|
121 1
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122 1 //<2F>}<7D>ҭp<D2AD>ɾ<EFBFBD>
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||||||
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123 1 TR1 = 1;
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124 1
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125 1 //<2F><> TF1 <20>S<EFBFBD><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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||||||
|
126 1 while(TF1 == 0);
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127 1
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||||||
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128 1 //<2F><><EFBFBD><EFBFBD><EFBFBD>p<EFBFBD>ɾ<EFBFBD>
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||||||
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129 1 TR1 = 0;
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||||||
|
130 1
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||||||
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131 1 //<2F>N TF1 <20>k<EFBFBD>s
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||||||
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132 1 TF1 = 0;
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||||||
|
133 1
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134 1 }
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MODULE INFORMATION: STATIC OVERLAYABLE
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||||||
|
CODE SIZE = 122 ----
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||||||
|
CONSTANT SIZE = 10 ----
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||||||
|
XDATA SIZE = ---- ----
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||||||
|
PDATA SIZE = ---- ----
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||||||
|
DATA SIZE = ---- 2
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||||||
|
IDATA SIZE = ---- ----
|
||||||
|
BIT SIZE = ---- ----
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||||||
|
END OF MODULE INFORMATION.
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||||||
|
|
||||||
|
|
||||||
|
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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||||||
156
Listings/TimerDelay_1.m51
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156
Listings/TimerDelay_1.m51
Normal file
@ -0,0 +1,156 @@
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BL51 BANKED LINKER/LOCATER V6.22 05/05/2018 23:36:54 PAGE 1
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||||||
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BL51 BANKED LINKER/LOCATER V6.22, INVOKED BY:
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||||||
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C:\KEIL_V5\C51\BIN\BL51.EXE .\Objects\TimerDelay_1.obj TO .\Objects\TimerDelay_1 PRINT (.\Listings\TimerDelay_1.m51)
|
||||||
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|
||||||
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|
||||||
|
MEMORY MODEL: SMALL
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||||||
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||||||
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INPUT MODULES INCLUDED:
|
||||||
|
.\Objects\TimerDelay_1.obj (TIMERDELAY_1)
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||||||
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C:\KEIL_V5\C51\LIB\C51S.LIB (?C_STARTUP)
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||||||
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|
||||||
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||||||
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LINK MAP OF MODULE: .\Objects\TimerDelay_1 (TIMERDELAY_1)
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||||||
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||||||
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||||||
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TYPE BASE LENGTH RELOCATION SEGMENT NAME
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||||||
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-----------------------------------------------------
|
||||||
|
|
||||||
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* * * * * * * D A T A M E M O R Y * * * * * * *
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||||||
|
REG 0000H 0008H ABSOLUTE "REG BANK 0"
|
||||||
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DATA 0008H 0002H UNIT _DATA_GROUP_
|
||||||
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IDATA 000AH 0001H UNIT ?STACK
|
||||||
|
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||||||
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* * * * * * * C O D E M E M O R Y * * * * * * *
|
||||||
|
CODE 0000H 0003H ABSOLUTE
|
||||||
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0003H 07FDH *** GAP ***
|
||||||
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CODE 0800H 0034H UNIT ?PR?MAIN?TIMERDELAY_1
|
||||||
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CODE 0834H 0017H UNIT ?PR?DELAY_1MS?TIMERDELAY_1
|
||||||
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CODE 084BH 0017H UNIT ?PR?DELAY_1500MS?TIMERDELAY_1
|
||||||
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CODE 0862H 000CH UNIT ?PR?_SLECT_SEG?TIMERDELAY_1
|
||||||
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CODE 086EH 000CH UNIT ?PR?_DISPLAY_SEG?TIMERDELAY_1
|
||||||
|
CODE 087AH 000CH UNIT ?C_C51STARTUP
|
||||||
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CODE 0886H 000AH UNIT ?CO?TIMERDELAY_1
|
||||||
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||||||
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|
||||||
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|
||||||
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OVERLAY MAP OF MODULE: .\Objects\TimerDelay_1 (TIMERDELAY_1)
|
||||||
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|
||||||
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||||||
|
SEGMENT DATA_GROUP
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||||||
|
+--> CALLED SEGMENT START LENGTH
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||||||
|
-----------------------------------------------------
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||||||
|
?C_C51STARTUP ----- -----
|
||||||
|
+--> ?PR?MAIN?TIMERDELAY_1
|
||||||
|
|
||||||
|
?PR?MAIN?TIMERDELAY_1 0008H 0002H
|
||||||
|
+--> ?PR?_SLECT_SEG?TIMERDELAY_1
|
||||||
|
+--> ?CO?TIMERDELAY_1
|
||||||
|
+--> ?PR?_DISPLAY_SEG?TIMERDELAY_1
|
||||||
|
+--> ?PR?DELAY_1500MS?TIMERDELAY_1
|
||||||
|
|
||||||
|
?PR?_SLECT_SEG?TIMERDELAY_1 ----- -----
|
||||||
|
+--> ?PR?DELAY_1MS?TIMERDELAY_1
|
||||||
|
|
||||||
|
?PR?_DISPLAY_SEG?TIMERDELAY_1 ----- -----
|
||||||
|
+--> ?PR?DELAY_1MS?TIMERDELAY_1
|
||||||
|
|
||||||
|
|
||||||
|
BL51 BANKED LINKER/LOCATER V6.22 05/05/2018 23:36:54 PAGE 2
|
||||||
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|
||||||
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|
||||||
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|
||||||
|
SYMBOL TABLE OF MODULE: .\Objects\TimerDelay_1 (TIMERDELAY_1)
|
||||||
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|
||||||
|
VALUE TYPE NAME
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||||||
|
----------------------------------
|
||||||
|
|
||||||
|
------- MODULE TIMERDELAY_1
|
||||||
|
C:0000H SYMBOL _ICE_DUMMY_
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||||||
|
C:0862H PUBLIC _Slect_Seg
|
||||||
|
D:0080H PUBLIC P0
|
||||||
|
D:00A0H PUBLIC P2
|
||||||
|
C:0834H PUBLIC delay_1ms
|
||||||
|
B:00A0H.6 PUBLIC P2_6
|
||||||
|
B:00A0H.7 PUBLIC P2_7
|
||||||
|
C:084BH PUBLIC delay_1500ms
|
||||||
|
C:0800H PUBLIC main
|
||||||
|
D:0089H PUBLIC TMOD
|
||||||
|
B:0088H.7 PUBLIC TF1
|
||||||
|
D:008DH PUBLIC TH1
|
||||||
|
D:008BH PUBLIC TL1
|
||||||
|
B:0088H.6 PUBLIC TR1
|
||||||
|
C:086EH PUBLIC _Display_Seg
|
||||||
|
C:0886H PUBLIC NUM
|
||||||
|
------- PROC MAIN
|
||||||
|
------- DO
|
||||||
|
D:0008H SYMBOL i
|
||||||
|
------- ENDDO
|
||||||
|
C:0800H LINE# 32
|
||||||
|
C:0800H LINE# 34
|
||||||
|
C:0805H LINE# 38
|
||||||
|
C:0805H LINE# 41
|
||||||
|
C:080AH LINE# 42
|
||||||
|
C:081CH LINE# 43
|
||||||
|
C:081FH LINE# 44
|
||||||
|
------- ENDPROC MAIN
|
||||||
|
------- PROC _SLECT_SEG
|
||||||
|
D:0007H SYMBOL number
|
||||||
|
C:0862H LINE# 49
|
||||||
|
C:0862H LINE# 52
|
||||||
|
C:0864H LINE# 55
|
||||||
|
C:0866H LINE# 58
|
||||||
|
C:0868H LINE# 61
|
||||||
|
C:086BH LINE# 64
|
||||||
|
C:086DH LINE# 65
|
||||||
|
------- ENDPROC _SLECT_SEG
|
||||||
|
------- PROC _DISPLAY_SEG
|
||||||
|
D:0007H SYMBOL display
|
||||||
|
C:086EH LINE# 67
|
||||||
|
C:086EH LINE# 70
|
||||||
|
C:0870H LINE# 73
|
||||||
|
C:0872H LINE# 76
|
||||||
|
C:0874H LINE# 79
|
||||||
|
C:0877H LINE# 82
|
||||||
|
C:0879H LINE# 83
|
||||||
|
------- ENDPROC _DISPLAY_SEG
|
||||||
|
------- PROC DELAY_1MS
|
||||||
|
C:0834H LINE# 88
|
||||||
|
BL51 BANKED LINKER/LOCATER V6.22 05/05/2018 23:36:54 PAGE 3
|
||||||
|
|
||||||
|
|
||||||
|
C:0834H LINE# 90
|
||||||
|
C:0837H LINE# 93
|
||||||
|
C:0839H LINE# 94
|
||||||
|
C:083BH LINE# 95
|
||||||
|
C:083EH LINE# 96
|
||||||
|
C:0841H LINE# 99
|
||||||
|
C:0843H LINE# 102
|
||||||
|
C:0846H LINE# 105
|
||||||
|
C:0848H LINE# 108
|
||||||
|
C:084AH LINE# 109
|
||||||
|
------- ENDPROC DELAY_1MS
|
||||||
|
------- PROC DELAY_1500MS
|
||||||
|
C:084BH LINE# 112
|
||||||
|
C:084BH LINE# 114
|
||||||
|
C:084EH LINE# 117
|
||||||
|
C:0850H LINE# 118
|
||||||
|
C:0852H LINE# 119
|
||||||
|
C:0855H LINE# 120
|
||||||
|
C:0858H LINE# 123
|
||||||
|
C:085AH LINE# 126
|
||||||
|
C:085DH LINE# 129
|
||||||
|
C:085FH LINE# 132
|
||||||
|
C:0861H LINE# 134
|
||||||
|
------- ENDPROC DELAY_1500MS
|
||||||
|
------- ENDMOD TIMERDELAY_1
|
||||||
|
|
||||||
|
******************************************************************************
|
||||||
|
* RESTRICTED VERSION WITH 0800H BYTE CODE SIZE LIMIT; USED: 0084H BYTE ( 6%) *
|
||||||
|
******************************************************************************
|
||||||
|
|
||||||
|
Program Size: data=11.0 xdata=0 code=147
|
||||||
|
LINK/LOCATE RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
|
||||||
BIN
Objects/TimerDelay_1
Normal file
BIN
Objects/TimerDelay_1
Normal file
Binary file not shown.
33
Objects/TimerDelay_1.build_log.htm
Normal file
33
Objects/TimerDelay_1.build_log.htm
Normal file
@ -0,0 +1,33 @@
|
|||||||
|
<html>
|
||||||
|
<body>
|
||||||
|
<pre>
|
||||||
|
<h1><EFBFBD>Vision Build Log</h1>
|
||||||
|
<h2>Tool Versions:</h2>
|
||||||
|
IDE-Version: <20>gVision V5.14.2
|
||||||
|
Copyright (C) 2015 ARM Ltd and ARM Germany GmbH. All rights reserved.
|
||||||
|
License Information: jane jane, no, LIC=----
|
||||||
|
|
||||||
|
Tool Versions:
|
||||||
|
Toolchain: PK51 Prof. Develpers Kit Version: 9.54
|
||||||
|
Toolchain Path: C:\Keil_v5\C51\BIN
|
||||||
|
C Compiler: C51.exe V9.54
|
||||||
|
Assembler: A51.exe V8.02c
|
||||||
|
Linker/Locator: BL51.exe V6.22
|
||||||
|
Library Manager: LIB51.exe V4.30.1.0
|
||||||
|
Hex Converter: OH51.exe V2.7.0.0
|
||||||
|
CPU DLL: S8051.DLL V3.100.0.0
|
||||||
|
Dialog DLL: DP51.DLL V2.62.0.1
|
||||||
|
<h2>Project:</h2>
|
||||||
|
C:\Users\jj971\Desktop\TimerDelay_1\TimerDelay_1.uvproj
|
||||||
|
Project File Date: 05/02/2018
|
||||||
|
|
||||||
|
<h2>Output:</h2>
|
||||||
|
Rebuild target 'Target 1'
|
||||||
|
compiling TimerDelay_1.c...
|
||||||
|
linking...
|
||||||
|
Program Size: data=11.0 xdata=0 code=147
|
||||||
|
creating hex file from ".\Objects\TimerDelay_1"...
|
||||||
|
".\Objects\TimerDelay_1" - 0 Error(s), 0 Warning(s).
|
||||||
|
</pre>
|
||||||
|
</body>
|
||||||
|
</html>
|
||||||
3
Objects/TimerDelay_1.lnp
Normal file
3
Objects/TimerDelay_1.lnp
Normal file
@ -0,0 +1,3 @@
|
|||||||
|
".\Objects\TimerDelay_1.obj"
|
||||||
|
TO ".\Objects\TimerDelay_1"
|
||||||
|
PRINT(".\Listings\TimerDelay_1.m51")
|
||||||
198
STARTUP.A51
Normal file
198
STARTUP.A51
Normal file
@ -0,0 +1,198 @@
|
|||||||
|
$NOMOD51
|
||||||
|
;------------------------------------------------------------------------------
|
||||||
|
; This file is part of the C51 Compiler package
|
||||||
|
; Copyright (c) 1988-2005 Keil Elektronik GmbH and Keil Software, Inc.
|
||||||
|
; Version 8.01
|
||||||
|
;
|
||||||
|
; *** <<< Use Configuration Wizard in Context Menu >>> ***
|
||||||
|
;------------------------------------------------------------------------------
|
||||||
|
; STARTUP.A51: This code is executed after processor reset.
|
||||||
|
;
|
||||||
|
; To translate this file use A51 with the following invocation:
|
||||||
|
;
|
||||||
|
; A51 STARTUP.A51
|
||||||
|
;
|
||||||
|
; To link the modified STARTUP.OBJ file to your application use the following
|
||||||
|
; Lx51 invocation:
|
||||||
|
;
|
||||||
|
; Lx51 your object file list, STARTUP.OBJ controls
|
||||||
|
;
|
||||||
|
;------------------------------------------------------------------------------
|
||||||
|
;
|
||||||
|
; User-defined <h> Power-On Initialization of Memory
|
||||||
|
;
|
||||||
|
; With the following EQU statements the initialization of memory
|
||||||
|
; at processor reset can be defined:
|
||||||
|
;
|
||||||
|
; <o> IDATALEN: IDATA memory size <0x0-0x100>
|
||||||
|
; <i> Note: The absolute start-address of IDATA memory is always 0
|
||||||
|
; <i> The IDATA space overlaps physically the DATA and BIT areas.
|
||||||
|
IDATALEN EQU 80H
|
||||||
|
;
|
||||||
|
; <o> XDATASTART: XDATA memory start address <0x0-0xFFFF>
|
||||||
|
; <i> The absolute start address of XDATA memory
|
||||||
|
XDATASTART EQU 0
|
||||||
|
;
|
||||||
|
; <o> XDATALEN: XDATA memory size <0x0-0xFFFF>
|
||||||
|
; <i> The length of XDATA memory in bytes.
|
||||||
|
XDATALEN EQU 0
|
||||||
|
;
|
||||||
|
; <o> PDATASTART: PDATA memory start address <0x0-0xFFFF>
|
||||||
|
; <i> The absolute start address of PDATA memory
|
||||||
|
PDATASTART EQU 0H
|
||||||
|
;
|
||||||
|
; <o> PDATALEN: PDATA memory size <0x0-0xFF>
|
||||||
|
; <i> The length of PDATA memory in bytes.
|
||||||
|
PDATALEN EQU 0H
|
||||||
|
;
|
||||||
|
;</h>
|
||||||
|
;------------------------------------------------------------------------------
|
||||||
|
;
|
||||||
|
;<h> Reentrant Stack Initialization
|
||||||
|
;
|
||||||
|
; The following EQU statements define the stack pointer for reentrant
|
||||||
|
; functions and initialized it:
|
||||||
|
;
|
||||||
|
; <h> Stack Space for reentrant functions in the SMALL model.
|
||||||
|
; <q> IBPSTACK: Enable SMALL model reentrant stack
|
||||||
|
; <i> Stack space for reentrant functions in the SMALL model.
|
||||||
|
IBPSTACK EQU 0 ; set to 1 if small reentrant is used.
|
||||||
|
; <o> IBPSTACKTOP: End address of SMALL model stack <0x0-0xFF>
|
||||||
|
; <i> Set the top of the stack to the highest location.
|
||||||
|
IBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1
|
||||||
|
; </h>
|
||||||
|
;
|
||||||
|
; <h> Stack Space for reentrant functions in the LARGE model.
|
||||||
|
; <q> XBPSTACK: Enable LARGE model reentrant stack
|
||||||
|
; <i> Stack space for reentrant functions in the LARGE model.
|
||||||
|
XBPSTACK EQU 0 ; set to 1 if large reentrant is used.
|
||||||
|
; <o> XBPSTACKTOP: End address of LARGE model stack <0x0-0xFFFF>
|
||||||
|
; <i> Set the top of the stack to the highest location.
|
||||||
|
XBPSTACKTOP EQU 0xFFFF +1 ; default 0FFFFH+1
|
||||||
|
; </h>
|
||||||
|
;
|
||||||
|
; <h> Stack Space for reentrant functions in the COMPACT model.
|
||||||
|
; <q> PBPSTACK: Enable COMPACT model reentrant stack
|
||||||
|
; <i> Stack space for reentrant functions in the COMPACT model.
|
||||||
|
PBPSTACK EQU 0 ; set to 1 if compact reentrant is used.
|
||||||
|
;
|
||||||
|
; <o> PBPSTACKTOP: End address of COMPACT model stack <0x0-0xFFFF>
|
||||||
|
; <i> Set the top of the stack to the highest location.
|
||||||
|
PBPSTACKTOP EQU 0xFF +1 ; default 0FFH+1
|
||||||
|
; </h>
|
||||||
|
;</h>
|
||||||
|
;------------------------------------------------------------------------------
|
||||||
|
;
|
||||||
|
; Memory Page for Using the Compact Model with 64 KByte xdata RAM
|
||||||
|
; <e>Compact Model Page Definition
|
||||||
|
;
|
||||||
|
; <i>Define the XDATA page used for PDATA variables.
|
||||||
|
; <i>PPAGE must conform with the PPAGE set in the linker invocation.
|
||||||
|
;
|
||||||
|
; Enable pdata memory page initalization
|
||||||
|
PPAGEENABLE EQU 0 ; set to 1 if pdata object are used.
|
||||||
|
;
|
||||||
|
; <o> PPAGE number <0x0-0xFF>
|
||||||
|
; <i> uppermost 256-byte address of the page used for PDATA variables.
|
||||||
|
PPAGE EQU 0
|
||||||
|
;
|
||||||
|
; <o> SFR address which supplies uppermost address byte <0x0-0xFF>
|
||||||
|
; <i> most 8051 variants use P2 as uppermost address byte
|
||||||
|
PPAGE_SFR DATA 0A0H
|
||||||
|
;
|
||||||
|
; </e>
|
||||||
|
;------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
; Standard SFR Symbols
|
||||||
|
ACC DATA 0E0H
|
||||||
|
B DATA 0F0H
|
||||||
|
SP DATA 81H
|
||||||
|
DPL DATA 82H
|
||||||
|
DPH DATA 83H
|
||||||
|
|
||||||
|
NAME ?C_STARTUP
|
||||||
|
|
||||||
|
|
||||||
|
?C_C51STARTUP SEGMENT CODE
|
||||||
|
?STACK SEGMENT IDATA
|
||||||
|
|
||||||
|
RSEG ?STACK
|
||||||
|
DS 1
|
||||||
|
|
||||||
|
EXTRN CODE (?C_START)
|
||||||
|
PUBLIC ?C_STARTUP
|
||||||
|
|
||||||
|
CSEG AT 0
|
||||||
|
?C_STARTUP: LJMP STARTUP1
|
||||||
|
|
||||||
|
RSEG ?C_C51STARTUP
|
||||||
|
|
||||||
|
STARTUP1:
|
||||||
|
|
||||||
|
IF IDATALEN <> 0
|
||||||
|
MOV R0,#IDATALEN - 1
|
||||||
|
CLR A
|
||||||
|
IDATALOOP: MOV @R0,A
|
||||||
|
DJNZ R0,IDATALOOP
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
IF XDATALEN <> 0
|
||||||
|
MOV DPTR,#XDATASTART
|
||||||
|
MOV R7,#LOW (XDATALEN)
|
||||||
|
IF (LOW (XDATALEN)) <> 0
|
||||||
|
MOV R6,#(HIGH (XDATALEN)) +1
|
||||||
|
ELSE
|
||||||
|
MOV R6,#HIGH (XDATALEN)
|
||||||
|
ENDIF
|
||||||
|
CLR A
|
||||||
|
XDATALOOP: MOVX @DPTR,A
|
||||||
|
INC DPTR
|
||||||
|
DJNZ R7,XDATALOOP
|
||||||
|
DJNZ R6,XDATALOOP
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
IF PPAGEENABLE <> 0
|
||||||
|
MOV PPAGE_SFR,#PPAGE
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
IF PDATALEN <> 0
|
||||||
|
MOV R0,#LOW (PDATASTART)
|
||||||
|
MOV R7,#LOW (PDATALEN)
|
||||||
|
CLR A
|
||||||
|
PDATALOOP: MOVX @R0,A
|
||||||
|
INC R0
|
||||||
|
DJNZ R7,PDATALOOP
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
IF IBPSTACK <> 0
|
||||||
|
EXTRN DATA (?C_IBP)
|
||||||
|
|
||||||
|
MOV ?C_IBP,#LOW IBPSTACKTOP
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
IF XBPSTACK <> 0
|
||||||
|
EXTRN DATA (?C_XBP)
|
||||||
|
|
||||||
|
MOV ?C_XBP,#HIGH XBPSTACKTOP
|
||||||
|
MOV ?C_XBP+1,#LOW XBPSTACKTOP
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
IF PBPSTACK <> 0
|
||||||
|
EXTRN DATA (?C_PBP)
|
||||||
|
MOV ?C_PBP,#LOW PBPSTACKTOP
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
MOV SP,#?STACK-1
|
||||||
|
|
||||||
|
; This code is required if you use L51_BANK.A51 with Banking Mode 4
|
||||||
|
;<h> Code Banking
|
||||||
|
; <q> Select Bank 0 for L51_BANK.A51 Mode 4
|
||||||
|
#if 0
|
||||||
|
; <i> Initialize bank mechanism to code bank 0 when using L51_BANK.A51 with Banking Mode 4.
|
||||||
|
EXTRN CODE (?B_SWITCH0)
|
||||||
|
CALL ?B_SWITCH0 ; init bank mechanism to code bank 0
|
||||||
|
#endif
|
||||||
|
;</h>
|
||||||
|
LJMP ?C_START
|
||||||
|
|
||||||
|
END
|
||||||
134
TimerDelay_1.c
Normal file
134
TimerDelay_1.c
Normal file
@ -0,0 +1,134 @@
|
|||||||
|
//<2F>P<EFBFBD>@<40><><EFBFBD>C<EFBFBD>`<60>X<EFBFBD><58><EFBFBD><EFBFBD> 0 - 9<>A<EFBFBD>C<EFBFBD>Ӹ<EFBFBD><D3B8>X<EFBFBD><58><EFBFBD>d 1.5 <20><>
|
||||||
|
|
||||||
|
#include <reg51.h>
|
||||||
|
|
||||||
|
// <20>ŧi D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD><CFBE>}
|
||||||
|
sbit P2_6 = P2^6;
|
||||||
|
sbit P2_7 = P2^7;
|
||||||
|
|
||||||
|
// <20>ŧi<C5A7><69><EFBFBD>ɨ禡
|
||||||
|
void delay_1ms();
|
||||||
|
void delay_1500ms();
|
||||||
|
|
||||||
|
// <20>ŧi<C5A7>C<EFBFBD>q<EFBFBD><71><EFBFBD>ܾ<EFBFBD><DCBE>禡
|
||||||
|
void Slect_Seg(unsigned char number);
|
||||||
|
void Display_Seg(unsigned char display);
|
||||||
|
|
||||||
|
//<2F>ŧi<C5A7>Ʀr<C6A6><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
char code NUM[10] = {
|
||||||
|
0x3F, // 0
|
||||||
|
0x06, // 1
|
||||||
|
0x5B, // 2
|
||||||
|
0x4F, // 3
|
||||||
|
0x66, // 4
|
||||||
|
0x6D, // 5
|
||||||
|
0x7D, // 6
|
||||||
|
0x07, // 7
|
||||||
|
0x7F, // 8
|
||||||
|
0x6F // 9
|
||||||
|
};
|
||||||
|
|
||||||
|
// <20>D<EFBFBD>{<7B><>
|
||||||
|
int main(){
|
||||||
|
// <20>]<5D>w<EFBFBD><77><EFBFBD><EFBFBD><EFBFBD>G
|
||||||
|
Slect_Seg(~0x01); // 0xfe <20>N<EFBFBD>O 11111110
|
||||||
|
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD><EFBFBD>{<7B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>L<EFBFBD>a<EFBFBD>j<EFBFBD><6A>
|
||||||
|
while(1) {
|
||||||
|
// <20><><EFBFBD>Ʀr<C6A6>q 0 - 9
|
||||||
|
int i;
|
||||||
|
for(i = 0; i < 10; i++) {
|
||||||
|
Display_Seg(NUM[i]);
|
||||||
|
delay_1500ms(); // <20><><EFBFBD><EFBFBD> 1.5 <20><>
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void Slect_Seg(unsigned char number) {
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>(<28>w<EFBFBD><77><EFBFBD><EFBFBD><EFBFBD>I)
|
||||||
|
P2_7 = 0;
|
||||||
|
|
||||||
|
// <20><><EFBFBD>w<EFBFBD><77><EFBFBD><EFBFBD><EFBFBD>G
|
||||||
|
P0 = number;
|
||||||
|
|
||||||
|
// <20>}<7D>ұ<EFBFBD><D2B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>G<EFBFBD><47> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>
|
||||||
|
P2_7 = 1;
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>(<28>Y<EFBFBD><59><EFBFBD><EFBFBD><EFBFBD>G)
|
||||||
|
delay_1ms();
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>(<28><><EFBFBD>Y<EFBFBD>i<EFBFBD>h<EFBFBD><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>T<EFBFBD>w<EFBFBD>G)
|
||||||
|
P2_7 = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void Display_Seg(unsigned char display) {
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>(<28>w<EFBFBD><77><EFBFBD><EFBFBD><EFBFBD>I)
|
||||||
|
P2_6 = 0;
|
||||||
|
|
||||||
|
// <20><><EFBFBD>w<EFBFBD><77><EFBFBD>X
|
||||||
|
P0 = display;
|
||||||
|
|
||||||
|
// <20>}<7D>ұ<EFBFBD><D2B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>G<EFBFBD><47> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>
|
||||||
|
P2_6 = 1;
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>(<28>Y<EFBFBD><59><EFBFBD>X)
|
||||||
|
delay_1ms();
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD> D <20><><EFBFBD><EFBFBD><EFBFBD>Ͼ<EFBFBD>(<28><><EFBFBD>Y<EFBFBD>i<EFBFBD>h<EFBFBD><68><EFBFBD><EFBFBD><EFBFBD>X<EFBFBD>T<EFBFBD>w<EFBFBD><77>)
|
||||||
|
P2_6 = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD> 1ms
|
||||||
|
void delay_1ms(void) {
|
||||||
|
//<2F>]<5D>w<EFBFBD><77> mode1
|
||||||
|
TMOD = 0x10;
|
||||||
|
|
||||||
|
//<2F>]<5D>w<EFBFBD><77><EFBFBD>l<EFBFBD><6C>
|
||||||
|
TF1 = 0;
|
||||||
|
TR1 = 0;
|
||||||
|
TL1 = (65536 - 9) % 256;
|
||||||
|
TH1 = (65536 - 9) / 256;
|
||||||
|
|
||||||
|
//<2F>}<7D>ҭp<D2AD>ɾ<EFBFBD>
|
||||||
|
TR1 = 1;
|
||||||
|
|
||||||
|
//<2F><> TF1 <20>S<EFBFBD><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
while(TF1 == 0);
|
||||||
|
|
||||||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD>p<EFBFBD>ɾ<EFBFBD>
|
||||||
|
TR1 = 0;
|
||||||
|
|
||||||
|
//<2F>N TF1 <20>k<EFBFBD>s
|
||||||
|
TF1 = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
// <20><><EFBFBD><EFBFBD> 1500ms
|
||||||
|
void delay_1500ms(void) {
|
||||||
|
//<2F>]<5D>w<EFBFBD><77> mode1
|
||||||
|
TMOD = 0x10;
|
||||||
|
|
||||||
|
//<2F>]<5D>w<EFBFBD><77><EFBFBD>l<EFBFBD><6C>
|
||||||
|
TF1 = 0;
|
||||||
|
TR1 = 0;
|
||||||
|
TL1 = (65536 - 13824) % 256;
|
||||||
|
TH1 = (65536 - 13824) / 256;
|
||||||
|
|
||||||
|
//<2F>}<7D>ҭp<D2AD>ɾ<EFBFBD>
|
||||||
|
TR1 = 1;
|
||||||
|
|
||||||
|
//<2F><> TF1 <20>S<EFBFBD><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
while(TF1 == 0);
|
||||||
|
|
||||||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD>p<EFBFBD>ɾ<EFBFBD>
|
||||||
|
TR1 = 0;
|
||||||
|
|
||||||
|
//<2F>N TF1 <20>k<EFBFBD>s
|
||||||
|
TF1 = 0;
|
||||||
|
|
||||||
|
}
|
||||||
1360
TimerDelay_1.uvgui.jj971
Normal file
1360
TimerDelay_1.uvgui.jj971
Normal file
File diff suppressed because one or more lines are too long
185
TimerDelay_1.uvopt
Normal file
185
TimerDelay_1.uvopt
Normal file
@ -0,0 +1,185 @@
|
|||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
<nMigrate>0</nMigrate>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>Target 1</TargetName>
|
||||||
|
<ToolsetNumber>0x0</ToolsetNumber>
|
||||||
|
<ToolsetName>MCS-51</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLK51>24000000</CLK51>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>1</RunSim>
|
||||||
|
<RunTarget>0</RunTarget>
|
||||||
|
<RunAbUc>0</RunAbUc>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>0</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>120</PageWidth>
|
||||||
|
<PageLength>65</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\Listings\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>255</CpuCode>
|
||||||
|
<Books>
|
||||||
|
<Book>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Title>Data Sheet</Title>
|
||||||
|
<Path>DATASHTS\ATMEL\AT89C51_DS.PDF</Path>
|
||||||
|
</Book>
|
||||||
|
<Book>
|
||||||
|
<Number>1</Number>
|
||||||
|
<Title>Instruction Set Manual</Title>
|
||||||
|
<Path>DATASHTS\ATMEL\AT_C51ISM.PDF</Path>
|
||||||
|
</Book>
|
||||||
|
</Books>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>1</uSim>
|
||||||
|
<uTrg>0</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>0</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>1</tRtrace>
|
||||||
|
<sRSysVw>1</sRSysVw>
|
||||||
|
<tRSysVw>1</tRSysVw>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<nTsel>-1</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon></pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>1</periodic>
|
||||||
|
<aLwin>0</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>0</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>0</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
<bLintAuto>0</bLintAuto>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>Source Group 1</GroupName>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>1</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<Focus>0</Focus>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>.\TimerDelay_1.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>TimerDelay_1.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
||||||
377
TimerDelay_1.uvproj
Normal file
377
TimerDelay_1.uvproj
Normal file
@ -0,0 +1,377 @@
|
|||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.1</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Targets>
|
||||||
|
<Target>
|
||||||
|
<TargetName>Target 1</TargetName>
|
||||||
|
<ToolsetNumber>0x0</ToolsetNumber>
|
||||||
|
<ToolsetName>MCS-51</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<TargetCommonOption>
|
||||||
|
<Device>AT89C51</Device>
|
||||||
|
<Vendor>Atmel</Vendor>
|
||||||
|
<Cpu>IRAM(0-0x7F) IROM(0-0xFFF) CLOCK(24000000)</Cpu>
|
||||||
|
<FlashUtilSpec></FlashUtilSpec>
|
||||||
|
<StartupFile>"LIB\STARTUP.A51" ("Standard 8051 Startup Code")</StartupFile>
|
||||||
|
<FlashDriverDll></FlashDriverDll>
|
||||||
|
<DeviceId>2976</DeviceId>
|
||||||
|
<RegisterFile>REGX51.H</RegisterFile>
|
||||||
|
<MemoryEnv></MemoryEnv>
|
||||||
|
<Cmp></Cmp>
|
||||||
|
<Asm></Asm>
|
||||||
|
<Linker></Linker>
|
||||||
|
<OHString></OHString>
|
||||||
|
<InfinionOptionDll></InfinionOptionDll>
|
||||||
|
<SLE66CMisc></SLE66CMisc>
|
||||||
|
<SLE66AMisc></SLE66AMisc>
|
||||||
|
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||||
|
<SFDFile></SFDFile>
|
||||||
|
<bCustSvd>0</bCustSvd>
|
||||||
|
<UseEnv>0</UseEnv>
|
||||||
|
<BinPath></BinPath>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
<LibPath></LibPath>
|
||||||
|
<RegisterFilePath>Atmel\</RegisterFilePath>
|
||||||
|
<DBRegisterFilePath>Atmel\</DBRegisterFilePath>
|
||||||
|
<TargetStatus>
|
||||||
|
<Error>0</Error>
|
||||||
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
<ButtonStop>0</ButtonStop>
|
||||||
|
<NotGenerated>0</NotGenerated>
|
||||||
|
<InvalidFlash>1</InvalidFlash>
|
||||||
|
</TargetStatus>
|
||||||
|
<OutputDirectory>.\Objects\</OutputDirectory>
|
||||||
|
<OutputName>TimerDelay_1</OutputName>
|
||||||
|
<CreateExecutable>1</CreateExecutable>
|
||||||
|
<CreateLib>0</CreateLib>
|
||||||
|
<CreateHexFile>1</CreateHexFile>
|
||||||
|
<DebugInformation>1</DebugInformation>
|
||||||
|
<BrowseInformation>1</BrowseInformation>
|
||||||
|
<ListingPath>.\Listings\</ListingPath>
|
||||||
|
<HexFormatSelection>0</HexFormatSelection>
|
||||||
|
<Merge32K>0</Merge32K>
|
||||||
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
|
<BeforeCompile>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopU1X>0</nStopU1X>
|
||||||
|
<nStopU2X>0</nStopU2X>
|
||||||
|
</BeforeCompile>
|
||||||
|
<BeforeMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopB1X>0</nStopB1X>
|
||||||
|
<nStopB2X>0</nStopB2X>
|
||||||
|
</BeforeMake>
|
||||||
|
<AfterMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopA1X>0</nStopA1X>
|
||||||
|
<nStopA2X>0</nStopA2X>
|
||||||
|
</AfterMake>
|
||||||
|
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||||
|
<SVCSIdString></SVCSIdString>
|
||||||
|
</TargetCommonOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>1</ComprImg>
|
||||||
|
<BankNo>65535</BankNo>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>S8051.DLL</SimDllName>
|
||||||
|
<SimDllArguments></SimDllArguments>
|
||||||
|
<SimDlgDll>DP51.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-p51</SimDlgDllArguments>
|
||||||
|
<TargetDllName>S8051.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments></TargetDllArguments>
|
||||||
|
<TargetDlgDll>TP51.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-p51</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>0</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
<Simulator>
|
||||||
|
<UseSimulator>1</UseSimulator>
|
||||||
|
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||||
|
<RunToMain>1</RunToMain>
|
||||||
|
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||||
|
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||||
|
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||||
|
<RestoreFunctions>1</RestoreFunctions>
|
||||||
|
<RestoreToolbox>1</RestoreToolbox>
|
||||||
|
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||||
|
<RestoreSysVw>1</RestoreSysVw>
|
||||||
|
</Simulator>
|
||||||
|
<Target>
|
||||||
|
<UseTarget>0</UseTarget>
|
||||||
|
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||||
|
<RunToMain>0</RunToMain>
|
||||||
|
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||||
|
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||||
|
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||||
|
<RestoreFunctions>0</RestoreFunctions>
|
||||||
|
<RestoreToolbox>1</RestoreToolbox>
|
||||||
|
<RestoreTracepoints>1</RestoreTracepoints>
|
||||||
|
<RestoreSysVw>1</RestoreSysVw>
|
||||||
|
</Target>
|
||||||
|
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||||
|
<TargetSelection>-1</TargetSelection>
|
||||||
|
<SimDlls>
|
||||||
|
<CpuDll></CpuDll>
|
||||||
|
<CpuDllArguments></CpuDllArguments>
|
||||||
|
<PeripheralDll></PeripheralDll>
|
||||||
|
<PeripheralDllArguments></PeripheralDllArguments>
|
||||||
|
<InitializationFile></InitializationFile>
|
||||||
|
</SimDlls>
|
||||||
|
<TargetDlls>
|
||||||
|
<CpuDll></CpuDll>
|
||||||
|
<CpuDllArguments></CpuDllArguments>
|
||||||
|
<PeripheralDll></PeripheralDll>
|
||||||
|
<PeripheralDllArguments></PeripheralDllArguments>
|
||||||
|
<InitializationFile></InitializationFile>
|
||||||
|
<Driver></Driver>
|
||||||
|
</TargetDlls>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>0</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>0</Capability>
|
||||||
|
<DriverSelection>-1</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>0</bUseTDR>
|
||||||
|
<Flash2></Flash2>
|
||||||
|
<Flash3></Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<Target51>
|
||||||
|
<Target51Misc>
|
||||||
|
<MemoryModel>0</MemoryModel>
|
||||||
|
<RTOS>0</RTOS>
|
||||||
|
<RomSize>2</RomSize>
|
||||||
|
<DataHold>0</DataHold>
|
||||||
|
<XDataHold>0</XDataHold>
|
||||||
|
<UseOnchipRom>0</UseOnchipRom>
|
||||||
|
<UseOnchipArithmetic>0</UseOnchipArithmetic>
|
||||||
|
<UseMultipleDPTR>0</UseMultipleDPTR>
|
||||||
|
<UseOnchipXram>0</UseOnchipXram>
|
||||||
|
<HadIRAM>1</HadIRAM>
|
||||||
|
<HadXRAM>0</HadXRAM>
|
||||||
|
<HadIROM>1</HadIROM>
|
||||||
|
<Moda2>0</Moda2>
|
||||||
|
<Moddp2>0</Moddp2>
|
||||||
|
<Modp2>0</Modp2>
|
||||||
|
<Mod517dp>0</Mod517dp>
|
||||||
|
<Mod517au>0</Mod517au>
|
||||||
|
<Mode2>0</Mode2>
|
||||||
|
<useCB>0</useCB>
|
||||||
|
<useXB>0</useXB>
|
||||||
|
<useL251>0</useL251>
|
||||||
|
<useA251>0</useA251>
|
||||||
|
<Mx51>0</Mx51>
|
||||||
|
<ModC812>0</ModC812>
|
||||||
|
<ModCont>0</ModCont>
|
||||||
|
<Lp51>0</Lp51>
|
||||||
|
<useXBS>0</useXBS>
|
||||||
|
<ModDA>0</ModDA>
|
||||||
|
<ModAB2>0</ModAB2>
|
||||||
|
<Mx51P>0</Mx51P>
|
||||||
|
<hadXRAM2>0</hadXRAM2>
|
||||||
|
<uocXram2>0</uocXram2>
|
||||||
|
<ModC2>0</ModC2>
|
||||||
|
<ModH2>0</ModH2>
|
||||||
|
<Mdu_R515>0</Mdu_R515>
|
||||||
|
<Mdu_F120>0</Mdu_F120>
|
||||||
|
<Psoc>0</Psoc>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<ModSmx2>0</ModSmx2>
|
||||||
|
<cBanks>0</cBanks>
|
||||||
|
<xBanks>0</xBanks>
|
||||||
|
<OnChipMemories>
|
||||||
|
<RCB>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x10000</Size>
|
||||||
|
</RCB>
|
||||||
|
<RXB>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</RXB>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocr1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocr1>
|
||||||
|
<Ocr2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocr2>
|
||||||
|
<Ocr3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocr3>
|
||||||
|
<IRO>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x1000</Size>
|
||||||
|
</IRO>
|
||||||
|
<IRA>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x80</Size>
|
||||||
|
</IRA>
|
||||||
|
<XRA>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRA>
|
||||||
|
<XRA512>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRA512>
|
||||||
|
<IROM512>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</IROM512>
|
||||||
|
</OnChipMemories>
|
||||||
|
</Target51Misc>
|
||||||
|
<C51>
|
||||||
|
<RegisterColoring>0</RegisterColoring>
|
||||||
|
<VariablesInOrder>0</VariablesInOrder>
|
||||||
|
<IntegerPromotion>1</IntegerPromotion>
|
||||||
|
<uAregs>0</uAregs>
|
||||||
|
<UseInterruptVector>1</UseInterruptVector>
|
||||||
|
<Fuzzy>3</Fuzzy>
|
||||||
|
<Optimize>8</Optimize>
|
||||||
|
<WarningLevel>2</WarningLevel>
|
||||||
|
<SizeSpeed>1</SizeSpeed>
|
||||||
|
<ObjectExtend>1</ObjectExtend>
|
||||||
|
<ACallAJmp>0</ACallAJmp>
|
||||||
|
<InterruptVectorAddress>0</InterruptVectorAddress>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</C51>
|
||||||
|
<Ax51>
|
||||||
|
<UseMpl>0</UseMpl>
|
||||||
|
<UseStandard>1</UseStandard>
|
||||||
|
<UseCase>0</UseCase>
|
||||||
|
<UseMod51>0</UseMod51>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Ax51>
|
||||||
|
<Lx51>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<linkonly>0</linkonly>
|
||||||
|
<UseMemoryFromTarget>1</UseMemoryFromTarget>
|
||||||
|
<CaseSensitiveSymbols>0</CaseSensitiveSymbols>
|
||||||
|
<WarningLevel>2</WarningLevel>
|
||||||
|
<DataOverlaying>1</DataOverlaying>
|
||||||
|
<OverlayString></OverlayString>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<DisableWarningNumbers></DisableWarningNumbers>
|
||||||
|
<LinkerCmdFile></LinkerCmdFile>
|
||||||
|
<Assign></Assign>
|
||||||
|
<ReserveString></ReserveString>
|
||||||
|
<CClasses></CClasses>
|
||||||
|
<UserClasses></UserClasses>
|
||||||
|
<CSection></CSection>
|
||||||
|
<UserSection></UserSection>
|
||||||
|
<CodeBaseAddress></CodeBaseAddress>
|
||||||
|
<XDataBaseAddress></XDataBaseAddress>
|
||||||
|
<PDataBaseAddress></PDataBaseAddress>
|
||||||
|
<BitBaseAddress></BitBaseAddress>
|
||||||
|
<DataBaseAddress></DataBaseAddress>
|
||||||
|
<IDataBaseAddress></IDataBaseAddress>
|
||||||
|
<Precede></Precede>
|
||||||
|
<Stack></Stack>
|
||||||
|
<CodeSegmentName></CodeSegmentName>
|
||||||
|
<XDataSegmentName></XDataSegmentName>
|
||||||
|
<BitSegmentName></BitSegmentName>
|
||||||
|
<DataSegmentName></DataSegmentName>
|
||||||
|
<IDataSegmentName></IDataSegmentName>
|
||||||
|
</Lx51>
|
||||||
|
</Target51>
|
||||||
|
</TargetOption>
|
||||||
|
<Groups>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Source Group 1</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>TimerDelay_1.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>.\TimerDelay_1.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
</Groups>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
</Project>
|
||||||
Reference in New Issue
Block a user